bitkeeper revision 1.1709.1.13 (42b1c394PElLHEtfGVY2A9O1xIx4aQ)

serial port back to work again

Signed-off-by Kevin Tian <Kevin.tian@intel.com>

diff --git a/xen/arch/ia64/vmx_ivt.S b/xen/arch/ia64/vmx_ivt.S
index 675315de1bd71b8143fd2369d3cdfb299443a7ca..407dc4cd86a36754accf98af331253e3e5cded6c 100644 (file)
--- a/xen/arch/ia64/vmx_ivt.S
+++ b/xen/arch/ia64/vmx_ivt.S
@@ -249,9 +249,9 @@ ENTRY(vmx_alt_itlb_miss)
        movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
        ;;
        and r19=r19,r16         // clear ed, reserved bits, and PTE control bits
-       shr.u r18=r16,57        // move address bit 61 to bit 4
+       shr.u r18=r16,55        // move address bit 59 to bit 4
        ;;
-       andcm r18=0x10,r18      // bit 4=~address-bit(61)
+       and r18=0x10,r18        // bit 4=address-bit(61)
        or r19=r17,r19          // insert PTE control bits into r19
        ;;
        or r19=r19,r18          // set bit 4 (uncached) if the access was to region 6
@@ -280,11 +280,11 @@ ENTRY(vmx_alt_dtlb_miss)
        ;;
        and r22=IA64_ISR_CODE_MASK,r20          // get the isr.code field
        tbit.nz p6,p7=r20,IA64_ISR_SP_BIT       // is speculation bit on?
-       shr.u r18=r16,57                        // move address bit 61 to bit 4
+       shr.u r18=r16,55                        // move address bit 59 to bit 4
        and r19=r19,r16                         // clear ed, reserved bits, and PTE control bits
        tbit.nz p9,p0=r20,IA64_ISR_NA_BIT       // is non-access bit on?
        ;;
-       andcm r18=0x10,r18      // bit 4=~address-bit(61)
+       and r18=0x10,r18        // bit 4=address-bit(61)
 (p9) cmp.eq.or.andcm p6,p7=IA64_ISR_CODE_LFETCH,r22    // check isr.code field
        dep r24=-1,r24,IA64_PSR_ED_BIT,1
        or r19=r19,r17          // insert PTE control bits into r19